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chr3764 - qeg rohs compliant ref. : dschr3764 - qeg1263 - 20 sep 11 1 / 18 specifications subject to change without notice united monolithic semiconductors s.a.s. route dpartementale 128 - bp46 - 91401 orsay cedex france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 21 - 27ghz down - converter gaas monolithic microwave ic in smd leadless package description the chr3764 - qeg is a multifunction monolithic circuit, which integrate s a balanced cold fet mixer, a multiplier by two, and a rf lna including gain control. it is designed for a wide range of applications, typically ism and commercial communication systems . the circuit is manufactured with a phemt process, 0.25m gate length, via holes through the substrate, air bridges and electron beam gate lithography. it is supplied in rohs compliant smd package. main features main characteristics tamb. = + 25c , vd = 4 v symbol parameter min typ max unit f rf rf frequency range 21 26.5 ghz f ol lo frequency range 8.5 15 ghz f if if frequency range dc 3.5 ghz nf noise figure@ min. att. , for if>0.1ghz 3.0 db ums r3764 yyww ? ? - 10 - 8 - 6 - 4 - 2 0 2 4 6 8 10 12 14 16 18 16 17 18 19 20 21 22 23 24 25 26 27 28 conversion gain (db) rf frequency (ghz) gcx= - 1.5v gcx= - 0.7v gcx= - 0.6v gcx= - 0.5v gcx=0v
chr3764 - qeg 21 - 27ghz down - converter ref. : dschr3764 - qeg1263 - 20 sep 11 2 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 electrical characteristics tamb = +25c, vd = vdl = 4 v symbol parameter min typ max unit f rf rf frequency range 21 26.5 ghz f ol lo frequency range 8.5 15 ghz f if if frequency range dc 3.5 ghz g c conversion gain @ min. attenuation 9 1 3 db ? g gain control range 1 4 db nf noise figure @ min. att. from 21 to 24ghz , for if>0.1ghz 3. 1 3.6 db noise figure @ min. att. from 24 to 26.5ghz , for if>0.1ghz 3. 6 4.1 db im_rej image rejection (1) 15 dbc p lo lo input power 0 5 dbm iip3 input ip3 @ min. attenuation 0 2 dbm input ip3 @ all gain range ( ? g) - 4 - 2 dbm 2lo/rf 2lo leakage at rf port @ max. gain 3 0 dbc rl rf rf r eturn loss - 10 db rl ol lo return loss - 8 db vd, vdl dc drain voltage 4 v id drain current (id + idl) 32 0 ma vgl lna dc gate voltage (2) - 0. 6 v gc2,3 gain control dc voltage - 2 - 1.5 0 v vgm mixer dc gate voltage - 0.7 v these values are representative of onboard measurements as defined on the drawing in paragraph "evaluation mother board". (1) an external combiner 90 is required on if ports, i / q. (2) typical vgl value for idl = 75ma see in paragraph biasing option other possibility to optimise differently the performances note: id is not affected by gain control ( gc2, gc3 ) .
21 - 27ghz down - converter chr3764 - qeg ref. : dschr3764 - qeg1263 - 20 sep 11 3 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 absolute maximum ratings (1) tamb.= + 25c symbol parameter values unit vd drain bias voltage 5 v id drain bias current 450 ma v gl lna dc gate voltage - 2 to +0.4 v vgm mixer dc gate voltage - 2 to +0.4 v gc2,3 gain control voltage - 2 to +0.8 v p rf maximum peak input power overdrive 10 dbm p lo maximum lo input power 10 dbm tj junction temperature (2) 175 c ta operating temperature range - 40 to +85 c tstg storage temperature range - 55 to +150 c (1) operation of this device above anyone of these parameters may cause permanent damage. (2) see device thermal performances typical bias conditions tamb.= + 25c symbol pad n o parameter values unit vdl, vd 10, 12 dc drain voltages 4 v id 10, 1 2 total drain current 32 0 ma vgl 9 dc gate voltage - 0.4 v vgm 11 dc gate voltage - 0.7 v gc2, gc3 7, 8 gain control dc voltage - 2 to +0 v
chr3764 - qeg 21 - 27ghz down - converter ref. : dschr3764 - qeg1263 - 20 sep 11 4 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 device thermal performances all the figures given in this section are obtained assuming that the qfn device is cooled down only by conduction through the package thermal pad (no convection mode considered). the temperature is monitored at the package back - side interface (tcase) as shown below. the system maximum temperature must be adjusted in order to guarantee that tcase remains bel ow than the maximum value specified in the next table. so, the system pcb must be designed to comply with this requirement. a derating must be applied on the dissipated power if the tcase temperature cannot be maintained below than the maximum temperature specified (see the curve pdiss. max) in order to guarantee the nominal device life time (mttf). recommended max. junction temperature (tj max) : 143 c junction temperature absolute maximum rating : 175 c max. continuous dissipated power (pdiss. max.) : 1.3 w => pdiss. max. derating above tcase (1) = 85 c : 22 mw/c junction-case thermal resistance (rth j-c) (2) : <45 c/w minimum tcase operating temperature (3) : -40 c maximum tcase operating temperature (3) : 85 c minimum storage temperature : -55 c maximum storage temperature : 150 c (1) derating at junctio n temperature co nstant = tj max. (2) rth j-c is calculated fo r a wo rst case co nsidering the ho t t e s t junc t io n o f the m m ic and all the devices biased. (3) tcase=p ackage back side temperature measured under the die-attach-pad (see the drawing belo w). 6.0 device thermal specification : CHR3764-QEG 0 0.2 0.4 0.6 0.8 1 1.2 1.4 - 50 - 25 0 25 50 75 100 125 150 175 pdiss. max. @tj 21 - 27ghz down - converter chr3764 - qeg ref. : dschr3764 - qeg1263 - 20 sep 11 5 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 typical board measurements tamb = +25c, vd = vdl = 4 v, vgl = - 0.6 v, vgm = - 0.7v, p_lo = 0dbm board is defined on the drawing at paragra ph evaluation mother b o a rd. the board losses are de - embedded . the results are given in the package access planes. conversion gain in supradyne mode versus rf frequency & gcx f_rf = 2xf_lo+f_if, f_if = 1.5 ghz conversion gain in infradyne mode versus rf frequency & gcx rf = 2xf_lo - f_if, f_if = 1.5 ghz - 10 - 8 - 6 - 4 - 2 0 2 4 6 8 10 12 14 16 18 16 17 18 19 20 21 22 23 24 25 26 27 28 conversion gain (db) rf frequency (ghz) gcx= - 1.5v gcx= - 0.7v gcx= - 0.6v gcx= - 0.5v gcx=0v - 10 - 8 - 6 - 4 - 2 0 2 4 6 8 10 12 14 16 18 16 17 18 19 20 21 22 23 24 25 26 27 28 conversion gain (db) rf frequency (ghz) gcx= - 1.5v gcx= - 0.7v gcx= - 0.6v gcx= - 0.5v gcx=0v
chr3764 - qeg 21 - 27ghz down - converter ref. : dschr3764 - qeg1263 - 20 sep 11 6 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 typical board measurements tamb = +25c, vd = vdl = 4 v, vgl = - 0.6 v, vgm = - 0.7v, p_lo = 0dbm noise figure at min. att. versus frequency f_rf = 2xf_lo - f_if & f_rf = 2xf_lo+f_if, f_if = 1.5 ghz, gcx = - 1.5v image rejection on supradyne & infradyne mode versus frequency f_if = 1.5 ghz, gcx = - 1.5v 0 1 2 3 4 5 6 7 8 9 10 20 21 22 23 24 25 26 27 noise figure (db) rf frequency (ghz) usb lsb 0 5 10 15 20 25 30 35 16 17 18 19 20 21 22 23 24 25 26 27 28 image rejection (dbc) rf frequency (ghz) lsb usb
21 - 27ghz down - converter chr3764 - qeg ref. : dschr3764 - qeg1263 - 20 sep 11 7 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 typical board measurements tamb = +25c, vd = vdl = 4 v, vgl = - 0.6 v, vgm = - 0.7v, p_lo = 0dbm input ip3 versus frequency at gcx = - 1.5v f_rf = 2xf_lo - f_if, f_if = 1 .5ghz input ip3 versus gcx f_rf = 2xf_lo - f_if, f_rf = 25.5ghz, f_if = 1 .5ghz - 6 - 4 - 2 0 2 4 6 8 10 12 14 16 - 28 - 26 - 24 - 22 - 20 - 18 - 16 - 14 - 12 - 10 input ip3 (dbm) input power dcl (dbm) 19.5ghz 22.5ghz 23.5ghz 24.5ghz 25.5ghz 26.5ghz - 6 - 4 - 2 0 2 4 6 8 10 12 14 16 - 28 - 26 - 24 - 22 - 20 - 18 - 16 - 14 - 12 - 10 input ip3 (dbm) input power dcl (dbm) - 2v - 0.7v - 0.6v - 0.5v - 0.3v
chr3764 - qeg 21 - 27ghz down - converter ref. : dschr3764 - qeg1263 - 20 sep 11 8 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 typical board measurements tamb = +25c, vd = vdl = 4 v, vgl = - 0.6 v, vgm = - 0.7v, p_lo = 0dbm imd3 versus gcx f_rf = 2xf_lo - f_if, f_rf = 25 .5ghz, f_if = 1 .5ghz rf & lo return loss 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 - 28 - 26 - 24 - 22 - 20 - 18 - 16 - 14 - 12 - 10 imd3 (dbc) input power dcl (dbm) - 2v - 0.7v - 0.6v - 0.5v - 0.3v - 20 - 18 - 16 - 14 - 12 - 10 - 8 - 6 - 4 - 2 0 0 5 10 15 20 25 30 return losses (db) frequency (ghz) rf at max. gain rf at min. gain lo
21 - 27ghz down - converter chr3764 - qeg ref. : dschr3764 - qeg1263 - 20 sep 11 9 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 typical board measurements tamb = +25c, vd = vdl = 4 v, vgl = - 0.6 v, vgm = - 0.7v, p_lo = 0dbm spurious on if outputs rf = 2lo + if p _rf = - 20dbm / p_lo = 0dbm @12 ghz nlo mrf 0 1 2 3 4 0 xx 37 20 41 37 1 26 49 >55 39 52 2 >50 >50 >55 >60 23 all values in dbc below if power level (if = 1 .5 ghz). data measured without external hybrid coupler.
chr3764 - qeg 21 - 27ghz down - converter ref. : dschr3764 - qeg1263 - 20 sep 11 10 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 temperature board measurements t = [ - 40, +25, 85] c, vd = vdl = 4 v, vgl = - 0.6 v, vgm = - 0.7v, p_lo = 0 dbm board is defined on the drawing at paragraph evaluation mother board. the board losses are de - embedded. the results are given in the package access planes. conversion gain in supradyne mode versus frequency f_rf = 2xf_lo+f_if, f_if = 1.5 ghz, gcx = - 1.5v & 0v board losses de - embedded (result given on package access planes) conversion gain in infradyne mode versus frequency rf = 2xf_lo - f_if, f_if = 2.0ghz, gcx = - 1.5v & 0v board losses de - embedded (result given on package access planes) - 10 - 8 - 6 - 4 - 2 0 2 4 6 8 10 12 14 16 18 20 16 17 18 19 20 21 22 23 24 25 26 27 28 conversion gain (db) rf frequency (ghz) - 40 c +25 c +85 c - 40 c +25 c +85 c - 10 - 8 - 6 - 4 - 2 0 2 4 6 8 10 12 14 16 18 20 16 17 18 19 20 21 22 23 24 25 26 27 28 conversion gain (db) rf frequency (ghz) - 40 c +25 c +85 c - 40 c +25 c +85 c
21 - 27ghz down - converter chr3764 - qeg ref. : dschr3764 - qeg1263 - 20 sep 11 11 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 temperature board measurements t = [ - 40, +25, 85] c, vd = vdl = 4 v, vgl = - 0.6 v, vgm = - 0.7v, p_lo = 0 dbm noise figure in supradyne mode at min. att. versus frequency f_rf = 2xf_lo+f_if, f_if = 1.5 ghz, gcx = - 1.5v board losses de - embedded (result given on package access planes) image rejection on supradyne mode versus frequency f_if = 1.5 ghz, gcx = - 1.5v 0 1 2 3 4 5 6 7 20 21 22 23 24 25 26 27 noise figure (db) rf frequency (ghz) 85 c 25 c - 40 c 0 5 10 15 20 25 30 35 16 17 18 19 20 21 22 23 24 25 26 27 28 image rejection (dbc) rf frequency (ghz) - 40 c +25 c +85 c
chr3764 - qeg 21 - 27ghz down - converter ref. : dschr3764 - qeg1263 - 20 sep 11 12 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 temperature board measurements t = [ - 40, +25, 85] c, vd = vdl = 4 v, vgl = - 0.6 v, vgm = - 0.7v, p_lo = 0 dbm input ip3 versus temperature at gcx = - 1.5v f_rf = 2xf_lo - f_if, f_rf = 25.5ghz, f_if = 1 .5ghz lo & 2lo leakage at gcx = - 1.5v at rf port and t= 25c - 8 - 6 - 4 - 2 0 2 4 6 8 10 - 28 - 26 - 24 - 22 - 20 - 18 - 16 - 14 - 12 - 10 iip3 (dbm) input power dcl (dbm) 85 c 25 c - 40 c - 80 - 75 - 70 - 65 - 60 - 55 - 50 - 45 - 40 - 35 - 30 - 25 - 20 - 15 - 10 - 5 0 16 18 20 22 24 26 28 lo leakage (dbm) rf frequency (ghz) 2lo lo
21 - 27ghz down - converter chr3764 - qeg ref. : dschr3764 - qeg1263 - 20 sep 11 13 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 package outline (1) matt tin, lead free (green) 1 - nc 9 - vgl 17 - nc units : mm 2 - nc 10 - vdl 18 - nc from the standard : jedec mo - 220 3 - nc 11 - vgm 19 - nc (vggd) 4 - gnd (2) 12 - vd 20 - if_i out 25 - gnd 5 - rf in 13 - nc 21 - gnd (2) 6 - gnd (2) 14 - gnd (2) 22 - if_q out 7 - gc3 15 - lo in 23 - nc 8 - gc2 16 - gnd (2) 24 - nc (1) the package outline drawing included to this data - sheet is given for indication. refer to the application note an0017 ( http://www.ums - gaas.com ) for exact package dimensions. (2) it is strongly recommended to ground all pins marked gnd through the pcb board.
chr3764 - qeg 21 - 27ghz down - converter ref. : dschr3764 - qeg1263 - 20 sep 11 14 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 evaluation mother board
21 - 27ghz down - converter chr3764 - qeg ref. : dschr3764 - qeg1263 - 20 sep 11 15 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 notes due to esd protection circuits on rf and lo inputs, an external capacitance might be requested to isolate the product from external voltage that could be present on these accesses in the application. esd protections are implemented on gate accesses. the dc connections do not include any decoupling capacitor in package, therefore it is mandatory to provide a good external dc decoupling on the pc board with smt capacitor , as close as possible to the package. recommended value is 10nf rf in gnd if_q if_i nc vdl gc3 gc2 vgl vgm vd 20 22 23 21 24 1 2 3 4 5 6 8 9 10 11 12 14 15 16 17 18 19 7 13 x2 lo in nc nc nc nc gnd gnd nc gnd gnd nc nc nc rf in gnd if_q if_i nc vdl gc3 gc2 vgl vgm vd 20 22 23 21 24 1 2 3 4 5 6 8 9 10 11 12 14 15 16 17 18 19 7 13 x2 lo in nc nc nc nc gnd gnd nc gnd gnd nc nc nc gnd if_q if_i nc vdl gc3 gc2 vgl vgm vd 20 22 23 21 24 1 2 3 4 5 6 8 9 10 11 12 14 15 16 17 18 19 7 13 x2 lo in nc nc nc nc gnd gnd nc gnd gnd nc nc nc
chr3764 - qeg 21 - 27ghz down - converter ref. : dschr3764 - qeg1263 - 20 sep 11 16 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 dc schematic lna ( 4 v, 75 ma ) lo buffer ( 4 v, 245 ma ) vdl=4v 64 ? 310 ? 2k ? 45 ? 22 ? 2.8k ? 3.3k ? 17 ? vgl~ - 0.53v 3.4k ? 3.4k ? 16ma 26ma 33ma gc3 [ - 1.5;0.5v] gc2 [ - 1.5;0.5v] vd= 4v 510 ? 100 ? 725 ? 1.6k ? 510 ? 220 ? 190 ? 40 ? 1k ? 25 ? differential amplifier differential multiplier buffer 1 buffer 2 100 ? 185 ? 8 ? 16 ? 960 ? 25 ? 960 ? 1k ? 100 ? 15 ? 15 ? 40 ? 40 ? 85ma 25ma 60ma 75ma 5.5 ? 5.5 ?
21 - 27ghz down - converter chr3764 - qeg ref. : dschr3764 - qeg1263 - 20 sep 11 17 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 bias ing options in order to improve the conversion gain and the noise figure, the biasing could be tuned . vgl voltage allows controlling idl current . table below gives the typical value for main characteristics . parameter vd=vdl= 4.0v idl= 75ma vd=vdl= 4.5v idl= 110ma conversion gain@min. att. (db) 1 3 14 noise figure@min. att. from 17 to 24ghz (db) 3. 1 3.0 input ip3@min. att. (dbm) 1 2 vgl (v) - 0.6 - 0.4 id (ma) 245 250 id + idl (ma) 320 360 total dc power consumption (mw) 1280 1620
chr3764 - qeg 21 - 27ghz down - converter ref. : dschr3764 - qeg1263 - 20 sep 11 18 / 18 specifications subject to change without notice route dpartementale 128, bp46 - 91401 orsay cedex - france tel.: +33 (0) 1 69 33 03 08 - fax: +33 (0) 1 69 33 03 09 recommended package footprint refer to the application note an0017 available at http://www.ums - gaas.com for package foot print recommendations. smd mounting procedure for the mounting process standard techniques involving solder paste and a suit able reflow process can be used. for further details, see application note an0017. recommended environmental management refer to the application note an0019 available at http://www.ums - gaas.com for environmental dat a on ums package products. recommended esd management refer to the application note an0020 available at http://www.ums - gaas.com for esd sensitivity and handling recommendations for the ums package products. ordering information qfn 4x5 rohs compliant package: chr3764 - qeg /xy stick: xy = 20 tape & reel: xy = 21 information furnished is believed to be accurate and reliable. however united monolithic semiconductors s.a.s. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of united monolithic semiconductors s.a.s. . specifications mentioned in thi s publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. united monolithic semiconductors s.a.s. products are not authorised for use as critical components in life support devices or systems without express written approval from united monolithic semiconductors s.a.s.

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